1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device capable of performing a refresh operation.
2. Description of the Related Art
In general, a semiconductor memory device such as a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) includes multiple memory banks for storing data and each of the memory banks includes a large number of memory cells. The memory cells each have a cell capacitor and a cell transistor. The semiconductor memory device stores data by charging and discharging the cell capacitor. Ideally, the charge stored in the cell capacitor is to remain constant. However, in reality, the charge stored in the cell capacitor changes due to voltage differences in peripheral circuits. In other words, a charged cell capacitor may leak or, in reverse, a cell capacitor that should remain discharged may gain a charge. The cell capacitor charges represent data, which means that a change in the charge (or the voltage level) of a cell capacitor, if significant, may result in loss of data. In order to prevent data from being lost, semiconductor memory devices perform what are known as refresh operations. Since ordinary refresh operation methods are widely known to those skilled in the art, a detailed description thereon will be omitted.
As fabrication technologies have developed, so has the degree of integration in semiconductor devices. The increase in integration has resulted in a corresponding reduction in the size of semiconductor memory banks. The decrease in size of the memory banks has resulted in a decrease in the spacing between memory cells, which means a decrease in the space between word lines coupled with the memory cells. As the space between word lines decreases, there is increased concern about interference between word lines, an example being coupling effects.
In order to access a specific memory cell in the semiconductor memory device, an active operation of a word line coupled to the memory cell may be performed. However, as the space between word lines becomes increasingly narrow, the active operations of a word line may cause a voltage gain/drop in a neighboring word line. The voltage gain/drop in the neighboring word line may result in unintended charging or discharging of neighboring memory cells. As previously discussed, if significant, this may result in the loss of data.
In order to prevent memory cells from losing data, the semiconductor memory device may perform a refresh operation on all of the memory cells in a given memory bank. In other words, the refresh operations may be performed at a frequency high enough to ensure that data is not lost even in word lines that experience the greatest amount of interference. However, this operation method results in some memory cells being refreshed more than needed, unnecessary power consumption, and losses in operation efficiency. It would therefore be beneficial to intelligently control the refresh operations of each memory cell or group of memory cells depending on need.
Another consideration that needs to be taken into account, as the degree of integration in semiconductor devices increases, is the effect of temperature. As the circuit sizes become smaller, circuit temperature has a greater influence on circuit operations. Therefore, research is being carried out regarding control of circuit operations and how they are influenced by temperature.